ADCs are core circuits in a vast array of electronic devices. Low power ADC design is special importance for applications with low-power, high accuracy constraints.
The power consumption of a conventional analog-to-digital converter (ADC) increases rapidly as a function of its accuracy. Since accuracy is desirable while power consumption is not, current ADC solutions are faced with a trade-off of either spending more power to get a higher accuracy, or by accepting a lower accuracy with a smaller power budget.
To address this limitation, some researchers have proposed ADC designs with lower power. Nevertheless, more efficient solutions are needed that provide an ADC that has less power consumption for the same accuracy (or, equivalently, more accuracy for the same power consumption) as prior art designs.